RFIC Design Layout Engineer - Samsung

Position Description

Need experienced RFIC Layout Designer on a contract basis for 6 months or less. One of the condition is that we need this person to work in Suwon Korea for at least 3 months (consecutive).

The engineer’s expertise must encompass experience in ASICs layout with low linewidth CMOS (Example; 65nm CMOS) in mixed signal environment; that is RF Circuits and Digital Circuits on the same substrate for simultaneous operations. (modification and optimization).


-Must have advanced experience with Cadence (design) as this is the tool they will use in Korea.

-Experience designing on handset

-Experience with using the TSMC process is preferred.

*Estimated 4-6 month project with full benefits offered from the start date.

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