Vast improvements in power consumption are essential if the Internet of Things (IoT), wearable devices and related wireless applications are to fulfill the lofty visions being laid out for them, says IBM Fellow Robert Dennard.
Dennard, the father of Dynamic Random Access Memory (DRAM) who also conducted seminal research on semiconductor scaling theory, is chasing that energy efficiency through his ongoing work in the world of CMOS technology for integrated circuits.
The 81-year-old electrical engineer spoke to FierceWirelessTech this week from San Diego, where he made a presentation at the annual Kyoto Prize Symposium. Dennard received the Kyoto Prize for Advanced Technology at a November 2013 ceremony in Kyoto, Japan.
Following his revolutionary conceptualization of DRAM in 1966, Dennard continued working through the 1970s and 1980s on MOSFET scaling equations, which calculate the impact on power density as transistors get smaller.
Dennard and his colleagues predicted that that as transistors got smaller, the power density per unit area would remain constant across process generations. That held true for some three decades and laid the foundation for Moore's Law.
However, about seven to nine years ago, "Dennard scaling" (Dennard does not care for that moniker, by the way, as he was working as part of a team) broke down because the voltage and current could no longer drop in sync with the reduction in transistor size.
Dennard said he and his team foresaw the eventual breakdown of MOSFET scaling theory. "It's kind of hard to go beyond the 45-nanometer node with that kind of scaling," he commented.
"We saw that somewhere in there, the voltage would get so low that we would not be able to scale the place at which the device itself turns on and turns off. There wasn't room in the voltage domain to turn the device on and off cleanly," Dennard noted.
Dennard and his colleagues have adapted a third generation of scaling principles that push energy-efficiency more than performance. "The big benefit of scaling as it continues is making things more energy-efficient, to reduce power consumption or the discharge rate for the batteries, that drive all of your wireless devices," he said.
Dennard said he is currently working with ET SOI (extremely thin silicon-on- insulator) CMOS, which is being eyed for next-generation CMOS ICs.
ET SOI "has a very thin layer of silicon bonded to an insulating layer on a regular silicon substrate," Dennard said. "These structures are capable of scaling a little better to smaller dimensions and can still enable devices to be turned on and off cleanly," he added.
"We really have to go to lower voltage operation. That's the part of the original scaling principles, and it's still the frontier in which I'm working," Dennard said. "With these new wireless applications, it's absolutely essential."
Dennard is far from alone in calling for increased energy efficiency, which has become part of the evolving 5G and IoT mantras.
For example, in a recent blog post, Tuomas Tirronen of Ericsson Research wrote that "the ability of many low-cost devices to stay operational for long periods of time may make or break the future visions" for IoT.
According to Europe's METIS 2020 research project, one of the top requirements for 5G is "10 times longer battery life for low-power massive machine communications where machines such as sensors or pagers will have a battery life of a decade."
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- see this San Diego Union Tribune article
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